Want to have access to 96TB (yes Terabytes) of RAM? Check out this CXL expansion box that shows what the future of memory looks like

Looking to beef up server capacity? The Inventec 96 DIMM CXL container could beryllium what you’re looking for. Unveiled astatine OCP Summit 2024 alongside Astera Labs, nan CXL description container allows users to link up to 96 DDR5 DIMMS to a azygous server, providing tremendous representation capacities ranging up to nan tens of terabytes per representation server.

As reported by ServeTheHome, nan description container tin link to nan upcoming eight-way Intel Xeon 6 Granite Rapids-SP server, offering an moreover bigger punch.

Combined pinch nan Intel Xeon 6 server, which boasts a full of 128 DDR DIMM slots, this intends users could harness a monolithic 244 DIMM slots for a azygous server, providing important representation capacity.

What you tin expect from nan 96 DIMM CXL description box

So what does this announcement mean exactly? Well, we’re talking astir important representation capacity boosts for servers.

The DDR5 DIMMS successful mobility present are DDR5-4800, and nan description container uses nan Astera Labs Leo. Elsewhere, users are capable to tie up 24 CDFP ports, each of which boasts a PCIe Gen5 x16 relationship linking nan CXL vessel and nan servers themselves.

As Servethehome noted, nan motorboat shows users tin tie upon a sizable 20TB of representation successful a azygous server, which has monolithic semipermanent implications for server capacities and marks a immense development.

Underpinning each of this is nan increasing imaginable of compute definitive nexus (CXL) technology.

In 2023, Meta announced a business pinch AMD to showcase a representation type that tin beryllium added onto servers and tin of recycling petabytes worthy of RAM.

As portion of nan collaboration, nan 2 firms showed CXL tin beryllium utilized to markedly amended representation efficiency, successful move reducing costs and enhancing performance.

The demo committee showcased by AMD and Meta included an AMD EPYC 9004 Genoa, boasted 4 dual in-line representation module (DIMM) slots, and a power descend and fan.

Astera Labs’ engagement present marks nan 2nd awesome announcement from nan semiconductor institution truthful acold this year. In April 2024, Astera Labs showcased its Aries 6 PCIe retimer board, which TechRadar Pro reported astatine nan time could unlock important benefits for hyperscalers ramping up AI development.

This retimer committee tin thief support information awesome integrity complete nan PCIe interface.

These high-speed information transfers typically suffer from degradation complete agelong distances aliases owed to interference.

The Aries 6 retimers marked nan first successful Astera Labs’ PCIe 6.x portfolio, and are aimed specifically astatine enhancing networking capabilities for next-generation GPUs, accelerators, CPUs, and CXL representation controllers.

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