Samsung plans record-breaking 400-layer NAND chip that could be key to breaking 200TB barrier for ultra large capacity AI hyperscaler SSDs

• Samsung to merchandise 400-layer NAND spot for AI information centers
• New BV NAND tech boosts density and minimizes power buildup
• Plans for 1,000-layer NAND by 2030 to grow capacity

Samsung is moving to motorboat a record-breaking 400-layer vertical NAND flash spot by 2026, reports person claimed.

A study by nan Korea Economic Daily says Samsung’s Device Solutions (DS) section intends to beforehand nan NAND flash marketplace pinch its cutting-edge V10 NAND, designed to meet surging request successful AI information centers.

The company’s representation roadmap, arsenic outlined successful nan report, shows plans for an precocious 10th-generation NAND that will utilize bonding exertion to separately build representation cells and nan peripheral circuitry connected different wafers, later fusing them into a azygous chip. Known arsenic bonding vertical NANDFlash (BV NAND), this caller attack minimizes power buildup and maximizes some capacity and performance, creating what Samsung has described arsenic a “dream NAND for AI.”

1,000 layers by 2030

The BV NAND design, boasting a 1.6x summation successful spot density per portion area, supports ultra-high-capacity solid-state drives (SSDs) perfect for AI applications.

Samsung’s existent 286-layer V9 NAND chips marked a important milestone, but nan 400-layer V10 is expected to redefine capacity limits, perchance breaking nan 200TB retention period for ultra-large AI hyperscaler SSDs, while improving power efficiency.

For early releases, world’s largest representation chipmaker plans to present 11th-generation V11 NAND successful 2027 pinch a 50% faster information transportation speed, further optimizing capacity for high-demand information retention needs.

Samsung’s eager NAND roadmap extends moreover further, pinch plans for chips exceeding 1,000 layers by 2030, KED reports. This advancement intends to support Samsung astatine nan forefront of nan high-capacity NAND market, wherever request is spurred by AI applications that require expansive retention solutions to process immense volumes of data.

In nan DRAM sector, Samsung intends to merchandise sixth-generation 1c DRAM and seventh-generation 1d DRAM by nan extremity of 2024, targeting usage successful high-performance AI chips. According to nan Korea Economic Daily report, nan institution besides has plans for sub-10 nm 0a DRAM by 2027, utilizing a vertical transmission transistor building for greater stableness and efficiency.

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